Tool Setup Improvement for Package Scratch Mitigation at End-of-Line Process
A. Sumagpang Jr. *
New Product Development & Introduction, STMicroelectronics, Inc., Calamba City, Laguna 4027, Philippines.
F. R. Gomez
New Product Development & Introduction, STMicroelectronics, Inc., Calamba City, Laguna 4027, Philippines.
R. Rodriguez
New Product Development & Introduction, STMicroelectronics, Inc., Calamba City, Laguna 4027, Philippines.
*Author to whom correspondence should be addressed.
Abstract
With new and continuous semiconductor technology trends, challenges in assembly manufacturing are inevitable. This paper focused on the elimination of assembly defects particularly package chip-out and scratch at the singulation end-of-line (EOL) process of a semiconductor device. Simulation using computer-aided design (CAD) tools, actual process replication, and validations were done, eventually verifying and replicating the desired defect signatures. Singulation tool setup of the package was improved and a standardized tool setup was established based on the simulation and actual validations, resulting to at least 90% improvement in assembly EOL process parts per million (ppm) reduction.
Keywords: Package scratch, chip-out, end-of-line, singulation, assembly