Incorporating Package Grinding Process for QFN Thin Device Manufacturing
Rennier S. Rodriguez
New Product Development and Introduction, STMicroelectronics, Inc., Calamba City, Laguna, 4027, Philippines.
Frederick Ray I. Gomez *
New Product Development and Introduction, STMicroelectronics, Inc., Calamba City, Laguna, 4027, Philippines.
*Author to whom correspondence should be addressed.
Abstract
Package thinning, down-scaling, and miniaturization are common interests among semiconductor industries, with each manufacturing site having different approach and technical directions in providing novelties in their products. The paper offers an innovative design of manufacturing flow to reduce the semiconductor package height of a Quad-Flat No-leads (QFN) device through the application of a specialized package grinding process. The process would significantly reduce the carrier thickness for the overall package height configuration of QFN. Through this integration, the common assembly barriers and defects related in producing thin devices are eliminated, thus thinner version manufacturing becomes more simplified and efficient.
Keywords: QFN, QFN multi-row, package grinding, leadframe design