Main Article Content
The need of data storage devices and new technologies continues to grow with more robust and stable functioning capability. With that, improvement and utilization never stop for a seamless output. One device that is currently on new product introduction is a quad-flat no-leads (QFN) utilizing a tapeless leadframe technology. The new device used highly conductive glue with metal spacer and has experienced gross glue voids defect parts per million (ppm). Glue voids were measured for cumulative voids criteria, with values higher compared to the specification. The study used analysis of variance (ANOVA) on the dispense needle diameter and revealed the effect levels of needle diameter on cumulative voids reduction. For subsequent works, the configuration could be applied for packages with similar requirement.
May GS, Spanos CJ. Fundamentals of semiconductor manufacturing and process control. 1st ed., Wiley-IEEE Press, USA; 2006.
Xian TS, Nanthakumar P. Dicing die attach challenges at multi die stack packages. 35th IEEE/CPMT International Electronics Manufacturing Technology Conference, Malaysia; 2012.
Liu Y, Irving S, Luk T, Kinzer D. Trends of power electronic packaging and modeling. 10th Electronics Packaging Technology Conference, Singapore; 2008.
Sumagpang Jr. A, Rada A. A systematic approach in optimizing critical processes of high density and high complexity new scalable device in MAT29 risk production using state-of-the-art platforms. Presented at the 22nd ASEMEP Technical Symposium, Philippines; 2012.
Colella M, Baldwin D. Void free processing of flip chip on board assemblies using no-flow underfills. In 9th International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces (IEEE Cat. No. 04TH8742). 2004 Proceedings. IEEE. 2004;272-281.
Duffy DJ, Desai M, Bhavsar H, Xin L, Liu J, Tolla B. Rheology design considerations for one step chip attach materials (OSCA) used for conventional mass reflow processing. In 2015 IEEE 65th Electronic Components and Technology Conference (ECTC). IEEE. 2015;180-186.
Meng LH, Hoe MC. Thermal simulation study of die attach delamination effect on tqfp package thermal resistance. 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT); 2010.
STMicroelectronics. Work instruction for die attach monitoring. rev. 65.0; 2019.
Abdullah S, Mohd Yusof S, Ahmad I, Jalar A, Daud R. Dicing die attach film for 3D stacked die QFN package. 32nd IEEE/ CPMT International Electronic Manu-facturing Technology Symposium, USA; 2007.
Krishnan P, Leong YK, Rafzanjani F, Batumalay N. Die attach film (DAF) for breakthrough in manufacturing (BIM) application. 36th International Electronics Manufacturing Technology Conference, Malaysia; 2014.
Rodriguez R, Gomez FR. Rubber-tip design improvement for die crack elimination at diebond process. Journal of Engineering Research and Reports. 2020; 12(2):2020.
Abdullah Z, Vigneswaran L, Ang A, Yuan GZ. Die attach capability on ultra thin wafer thickness for power semiconductor. 35th IEEE/CPMT International Electronics Manufacturing Technology Conference; 2012.
Gomez FR, Mangaoang Jr. T. Elimination of ESD events and optimizing waterjet deflash process for reduction of leakage current failures on QFN-mr leadframe devices. Journal of Electrical Engineering, David Publishing Co. 2018;6(4):238-243.