Wirebond Solution of Semiconductor IC Package through Modeling and Simulation

Main Article Content

Frederick Ray I. Gomez
Anthony R. Moreno
Jonathan C. Pulido


This technical paper presents a study of wirebond selection highlighting the package electrical modeling and simulation done for semiconductor integrated circuit (IC) leadframe package (hereinafter referred to as Device Z) with different wirebond configurations: Gold 2N 1.3 mil, Gold 4N 1.3 mil, Copper 1.3 mil, Copper 1.2 mil, Copper 1.1 mil and Copper 1.0 mil.  Package design, modeling and simulation are essentially important in the early stage of the package development, particularly at the package feasibility phase. 

As Device Z is previously assembled with Gold 4N 1.3 mil wirebond configuration, this technical paper focused in determining the best alternative for Gold 4N 1.3 mil in wirebonding through package modeling and simulation. Statistical analysis reinforced the study to verify the trend and to check if there is significant statistical difference in the resistance, inductance and capacitance (hereinafter referred to as RLC) performance of the device given the different wirebond configurations.  Cost analysis was crucial to determine the cost impact of using different wires.

Prioritizing the wirebond thickness and cost without sacrificing the electrical performance, Copper 1.1 mil would be the most suitable replacement for Gold 4N 1.3 mil wirebond configuration.  However, since Copper 1.1 mil is not yet available in the market, Copper 1.2 mil could be used, with better electrical parameters. In addition, Copper wire offered significant cost improvement over its Gold counterpart. Computed cost per unit of Copper 1.3 mil is just 6% of the total cost of the Gold 4N 1.3 mil – that is 94% cost savings. Ultimately, Copper wire technology offers significant cost savings and could pave the way for more businesses in the plant.

Package electrical modeling, simulation, wirebond, leadframe, semiconductor.

Article Details

How to Cite
Gomez, F. R. I., Moreno, A. R., & Pulido, J. C. (2019). Wirebond Solution of Semiconductor IC Package through Modeling and Simulation. Journal of Engineering Research and Reports, 7(3), 1-10. https://doi.org/10.9734/jerr/2019/v7i316970
Original Research Article


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